Category Archives: FPGA

Interfacing an FPGA with a PS/2 Keyboard: Part 1

As part of my “build a computer from scratch” project (overview blog post forthcoming) I need a keyboard. While building the USB stack from hardware up to software sounds like a fun project, I have quite a few other pieces to assemble and a PS/2 keyboard is much more expedient. So, I dropped by HSC Electronics Supply in Santa Clara and picked up the most old-school looking PS/2 keyboard the had, along with two 6-pin mini-DIN headers I could solder leads to.

Having only read about the PS/2 specification I wanted to put theory to practice and see the output during a keypress event. So, I assembled my PS/2 breakout, broke out my power supply and breadboard, and wired everything together. I set up my logic analyzer to capture the clock and data channels and was pleased to find a PS/2 analyzer option – however, I did find that lower capture rates – I went all the way down to 1 MS/s – were required to make the analyzer function properly. My guess is the analyzer isn’t applying much, if any, filtering to the data stream and glitches are corrupting the decode state machine.

I set the trigger on the falling edge of the clock signal and powered the keyboard up, expecting to see a BAT message from the keyboard.

On power-up PS/2 keyboards enter the basic assurance test (BAT) state and, if successful, send 0xAA “BAT successful” to the host.

I restarted the capture and pressed “a”. In the capture below you can see the decoded messages in the lower-right panel – both the “make” and “break” messages were captured.

After assembling my PS/2 header I wired it up on my breadboard and pressed ‘a’ – success!

With the smoke test out of the way I moved onto my second target – level shifting the clock and data signals to 3.3V to be able to interface with my miniSpartan6+ dev board. I didn’t have any level shifter ICs on hand but I did have some SOT-23 FETs. So, I put two of my IRLML2060TRPbF FETs on a SOT-23 breakout board, added a few pull-up resistors, and turned on analog capture on the logic analyzer.

The result – a nice 3.3V output on the host side, perfect for my FPGA.

My next post will detail the PS/2 link layer and keyboard controller modules for the FPGA. The goal is to emulate the register interface standard for PS/2 keyboard controllers, on top of this I will build a simple module that will translate keycodes into ASCII characters and spit them out the serial port on the miniSpartan6+.


Black Magic and FPGAs

As the title implies, this post is about black magic and FPGAs – really one and the same from my perspective at the moment. After talking to someone who knows a few things about engine controls (as well as considering some of the analysis I did before my recent ThumperFI hiatus), I established that interrupt-based timing is not the best approach. Currently I have the 16-bit timer on the ATmega644 connected to the ICP pin, which fires an interrupt at a rising edge of the trigger wheel signal. This seems like a great idea until you consider the fact that there’s a separate 8-bit timer firing at a fixed rate and that there are a number of complex calculations that need to happen during that interrupt (including a few 32-bit ones). I monitored some outputs on my logic analyzer to check timing of this interrupt, as well as the auxiliary 8-bit timer and found that the 16-bit timer was frequently pushing back the 8-bit timer interrupt which lead to incorrect timing.

What’s the solution to this? In industry, this is where the co-processor comes in. Where do FPGAs fit in to this? Well, FPGAs are at the forefront of engine control technology (there’s a great SAE paper about the application of some Drivven technology on an YZF-R6 about this very topic). FPGAs offer flexibility, high-speed, parallel processing and portability. You write your IP cores in a HDL and with little to no tweaking you can run your synthesized design on a vast array of different FPGAs. I recently procured a Mojo FPGA development board based on the Xilinix Spartan-6 family. I also have another board based on the Xilinix Spartan-3 family that has a few more useful learning features – like more buttons and LEDs. At the moment I’m just learning the basics of Verilog and how to think in parallel rather than sequential operations.

More to come on Verilog and FPGAs soon.